Logic Level shifter for 12864 display on Duet 2 Wifi
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thanks for the link! I won't share mine ... (the shame).
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Forgot I had eclipse set up to be used over ssh as well, seems the patch still applies cleanly and compiles against 2.05, but would need adapting to RRF3
Not sure if any level shifting is strictly necessary; the LCD has a 2V high level logic threshold with 5V Vcc*, the encoder is switched to GND so depends on pull ups on the Duet. The MISO signal comes straight from the SD card and should be 3.3v already (as the only driven input). The AND gate might still be needed to share the SPI bus between the LCD controller and the SD card (as well as daughter board and duex), but as far as I can tell the OE pin on the TXS0108 should achieve the same thing.
Forecast says sunshine for a week as of tomorrow so this probably not much more progress to be made
*) ST9720 disagrees with KXM12864M-3 specs so that may be why the AND chip kills two birds with one stone.
Edit: no dice with or without TXS0108, gonna doube check menu files, config and wirng when the sun goes away. Tried 500kz, 1mhz and 2mhz spi clock, but no difference.
Edit: WIP RRF3 patch -
I have an LCD12864 without SD card slot so maybe that's going to be a bit simpler (CR 20 stock display). I am also unfortunately bound with other duties for the next couple days ... but I am also waiting for the TSX0108 to arrive yet.
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Why do you want to use the TXS0108 instead of the 74HCT08 ?
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Can only speak for myself; didn't have any 74 chips, but had the txs0108 in the box of random modules. Tying chip select to (active high) output enable should provide the same logical and level shifting function as an AND gate as far as I could tell (without having studied the timing diagrams in detail). But if I were to order parts I'd probably go for the 74hct08 on the board layout derived from that blog post.
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@oliof said in Logic Level shifter for 12864 display on Duet 2 Wifi:
without SD card slot so maybe that's going to be a bit simpler
Probably not going to make much difference having an empty slot vs no slot, if there is a need for the logic it would be to avoid confusing the lcd with spi traffic the duet would make regardless of the physical slot (but without having studied the code in detail I'd expect it to be only at boot to detect sd cards, daughter and expansion boards, unless one of those are present ofc). And if the lcd has a proper spi interface it should ignore mosi/sck when cs isn't asserted so idk.
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@bearer said in Logic Level shifter for 12864 display on Duet 2 Wifi:
And if the lcd has a proper spi interface it should ignore mosi/sck when cs isn't asserted so idk.
That's what one would expect; however the V4.0 ST7920 datasheet says on page 29:
When chip select (CS) is low, ST7920 serial clock counter and serial data will be reset. Serial transfer counter is set
to the first bit and data register is cleared. After CS is “L”, any further change on SID or SCLK is not allowed. It is
recommended to keep SCLK at “L” and SID at the last status before set CS to “L”. For a minimal system with only
one ST7920 and one MPU, only SCLK and SID pins are necessary. CS pin should pull to high.That's why we gate SCLK with CS on the Maestro.
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@dc42 said in Logic Level shifter for 12864 display on Duet 2 Wifi:
That's why we gate SCLK with CS on the Maestro.
Thanks for confirming! Suspected as much from the design, 2 for 1 with the and gate, probably timing (or Gremlins) preventing the txs0108 module achieving the same thing.
Will poke it some more another day or perhaps sneak a 74hct08 in on the next part order.
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@bearer said in Logic Level shifter for 12864 display on Duet 2 Wifi:
probably timing (or Gremlins) preventing the txs0108 module achieving the same thing.
not 100% sure where the gremlings are/were but( <- dodgy USB cable and unstable 5v)
It works! Duet2Wifi + TXS0108 + RepRapDiscount Smart Controller (or geeetech clone with the headers corrected in any case). Confirms patch against 2.05 and schematic at least.
M918 12864 display is configured, pulses-per-click is 2 M115 FIRMWARE_NAME: RepRapFirmware for Duet 2 WiFi/Ethernet FIRMWARE_VERSION: 2.05.x LCD ELECTRONICS: Duet WiFi 1.02 or later FIRMWARE_DATE: 2020-04-16b4
forecast changed its mind no sunshine today >.<
edit: i would propose swapping lcd_cs to from PortDPin(21) / lcdconn.10 to PortAPin(7) / sdconn.7 as it would enable a single 10 way ribbon cable to function as just a display + sd reader (but no buttons/beep). Or maybe utxd0, urxd0 and spi0_cs could be used if the reader isn't present or needed.
(edit2: yes, i'm aware the duet is missing some parts)
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@dc42 are there any conventions or limitations to
# define MAIN_VERSION "2.05"
# define DATE "2020-04-14b3"
i see 3.01-RC7 gets a conditional
# define VERSION_SUFFIX " (CAN0)"
is that the way to go for various mischief? (i.e.
mlx90614
too long a string to add?) -
Yes I suggest you use a version suffix. I agree that mlx90614 is rather long. It's also obscure, at least to me. What does it mean?
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@dc42 said in Logic Level shifter for 12864 display on Duet 2 Wifi:
What does it mean?
unless i got it wrong its one of the non-contact spi temp sensors left over from an EV charger build. might find its way into a printer if this pandemic thing drags out..
but its aslo about the length of a short commit id so was wondering if there is a hard limit that i didn't see in my limited search. i don't expect to share any binaries but figure clearly tagging them in case of issues would be good.
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@bearer said in Logic Level shifter for 12864 display on Duet 2 Wifi:
Edit: WIP RRF3 patch
huh, must have missed it earlier:/
..bin/ld: Duet2CombinedFirmware.elf section `.ARM.exidx' will not fit in region `rom' ..bin/ld: region `rom' overflowed by 4900 bytes
oh well, RRF2 for now.
edit @ oliof: clearer picture of the wiring with some labels, do note I swapped two pins from the blogpost
diff --git a/src/DuetNG/Pins_DuetNG.h b/src/DuetNG/Pins_DuetNG.h index a9c30059..620d14ef 100644 --- a/src/DuetNG/Pins_DuetNG.h +++ b/src/DuetNG/Pins_DuetNG.h @@ -28,7 +28,7 @@ constexpr size_t NumFirmwareUpdateModules = 4; // 3 modules, plus one for manua #define SUPPORT_IOBITS 1 // set to support P parameter in G0/G1 commands #define SUPPORT_DHT_SENSOR 1 // set nonzero to support DHT temperature/humidity sensors #define SUPPORT_WORKPLACE_COORDINATES 1 // set nonzero to support G10 L2 and G53..59 -#define SUPPORT_12864_LCD 0 // set nonzero to support 12864 LCD and rotary encoder +#define SUPPORT_12864_LCD 1 // set nonzero to support 12864 LCD and rotary encoder #define SUPPORT_OBJECT_MODEL 1 #define SUPPORT_FTP 1 #define SUPPORT_TELNET 1 @@ -37,11 +37,11 @@ constexpr size_t NumFirmwareUpdateModules = 4; // 3 modules, plus one for manua // The physical capabilities of the machine -constexpr size_t NumDirectDrivers = 12; // The maximum number of drives supported directly by the electronics +constexpr size_t NumDirectDrivers = 11; // The maximum number of drives supported directly by the electronics constexpr size_t MaxTotalDrivers = NumDirectDrivers; // The maximum number of drives including CAN expansion constexpr size_t MaxSmartDrivers = 10; // The maximum number of smart drivers -constexpr size_t NumEndstops = 12; // The number of inputs we have for endstops, filament sensors etc. +constexpr size_t NumEndstops = 11; // The number of inputs we have for endstops, filament sensors etc. constexpr size_t NumHeaters = 8; // The number of heaters in the machine constexpr size_t NumExtraHeaterProtections = 8; // The number of extra heater protection instances constexpr size_t NumThermistorInputs = 8; @@ -72,9 +72,29 @@ constexpr Pin AdditionalIoExpansionStart = 220; // Pin numbers 220-235 are on t // DRIVES constexpr Pin GlobalTmc2660EnablePin = 38; // The pin that drives ENN of all TMC2660 drivers on production boards (on pre-production boards they are grounded) -constexpr Pin ENABLE_PINS[NumDirectDrivers] = { 78, 41, 42, 49, 57, 87, 88, 89, 90, 31, 82, 60 }; -constexpr Pin STEP_PINS[NumDirectDrivers] = { 70, 71, 72, 69, 68, 66, 65, 64, 67, 91, 84, 85 }; -constexpr Pin DIRECTION_PINS[NumDirectDrivers] = { 75, 76, 77, 01, 73, 92, 86, 80, 81, 32, 83, 25 }; +constexpr Pin ENABLE_PINS[NumDirectDrivers] = { 78, 41, 42, 49, 57, 87, 88, 89, 90, 31, 82}; +constexpr Pin STEP_PINS[NumDirectDrivers] = { 70, 71, 72, 69, 68, 66, 65, 64, 67, 91, 84}; +constexpr Pin DIRECTION_PINS[NumDirectDrivers] = { 75, 76, 77, 01, 73, 92, 86, 80, 81, 32, 83}; + +// 12864 LCD +// The ST7920 datasheet specifies minimum clock cycle time 400ns @ Vdd=4.5V, min. clock width 200ns high and 20ns low. +// This assumes that the Vih specification is met, which is 0.7 * Vcc = 3.5V @ Vcc=5V +// The Duet Maestro level shifts all 3 LCD signals to 5V, so we meet the Vih specification and can reliably run at 2MHz. +// For other electronics, there are reports that operation with 3.3V LCD signals may work if you reduce the clock frequency. +// ST7920 doesn't allow SCK/MISO signals when CS is not asserted, therefore the AND gate on the Maestro +constexpr uint32_t LcdSpiClockFrequency = 2000000; // 2.0MHz -- Top View -- +constexpr Pin LcdCSPin = 7; //connsd.7 --> gate -> exp1.4 | | +constexpr Pin LcdBeepPin = 60; //connlcd.4 -> exp1.1 | 10* *9 | +constexpr Pin EncoderPinA = 85; //connlcd.8 -> exp2.5 | | +constexpr Pin EncoderPinB = 25; //connlcd.6 -> exp2.3 | 8* *7 _| +constexpr Pin EncoderPinSw = 8; //connlcd.10 -> exp1.2 | | + //adittional spi wiring: | 6* *5 | + //connsd.6 <- exp2.1 (SD MISO) | |_ + //connsd.5 --> gate -> exp1.3 (LCD MOSI) | 4* *3 | + // `-> -> exp2.6 (SD MOSI) | | + //connsd.4 --> gate -> exp1.5 (LCD SCK) | 2* #1 | + // `-> -> exp2.2 (SD SCK) | | + //connsd.3 -> exp2.4 (SD CS) -------------- // Pin assignments etc. using USART1 in SPI mode Usart * const USART_TMC2660 = USART1; @@ -92,7 +112,7 @@ constexpr Pin DueX_INT = 17; // DueX interrupt pin = PA17 (was E6_STOP) // Endstops // RepRapFirmware only has a single endstop per axis. // Gcode defines if it is a max ("high end") or min ("low end") endstop and sets if it is active HIGH or LOW. -constexpr Pin END_STOP_PINS[NumEndstops] = { 46, 02, 93, 74, 48, 96, 97, 98, 99, 17, 39, 8 }; +constexpr Pin END_STOP_PINS[NumEndstops] = { 46, 02, 93, 74, 48, 96, 97, 98, 99, 17, 39}; constexpr Pin DUEX_END_STOP_PINS[5] = { 200, 203, 202, 201, 213 }; // these replace endstops 5-9 if a DueX is present // HEATERS diff --git a/src/Version.h b/src/Version.h index ac15bf0a..81082397 100644 --- a/src/Version.h +++ b/src/Version.h @@ -11,7 +11,7 @@ #ifndef VERSION #ifdef RTOS -# define MAIN_VERSION "2.05.1" +# define MAIN_VERSION "2.05.1+LCD" #else # define MAIN_VERSION "1.26.1" #endif @@ -20,7 +20,7 @@ #endif #ifndef DATE -# define DATE "2020-02-09b1" +# define DATE "2020-04-16b8" #endif #define AUTHORS "reprappro, dc42, chrishamm, t3p3, dnewman, printm3d"
(apply patch with
git apply --ignore-whitespace lcd12864.patch
as whitespace was tweaked for display)
And schematic; i only wired up the blue lines on the drawing.
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Got a delivery of ten boards with 74HCT08 on them just now. Tomorrow I'll need to solder on a bunch of headers ...
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@oliof said in Logic Level shifter for 12864 display on Duet 2 Wifi:
Got a delivery of ten boards with 74HCT08 on them just now.
wow thats fast! if thats from the original schematic in the blog post beware pin1 (the square pin) isn't really pin1 on all of those headers; read the description of how to orient the notches on the headers/idc's. (eyeballing it i'd say its H1 and H2 that are reversed, but do check the description)
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Indeed, 3 weeks turnaround isn't too bad (-:
It's the unchanged schematics and I will be careful!
In my pursuit for a small board to hide alon a cable length I may have left too little clearance for the headers.
A revision is likely inevitable, and then I'd go for your fixed layout if it's finalized by then.
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@oliof said in Logic Level shifter for 12864 display on Duet 2 Wifi:
3 weeks
ah, didn't realize you ordered them a that long ago, seemed like 3 days to me
(3 weeks is still quite good considering; I will likely need a break from banging my head against BLE 5 so can look over the 74hct08 layout one of these days np)
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@oliof said in Logic Level shifter for 12864 display on Duet 2 Wifi:
I will be careful!
quick tip is to measure ground on the duet to ground on the lcd12864 before powering up, if continuity good ods, and grounds are usually easy to spot making it an quick and easy test for reversed wires.
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@oliof said in Logic Level shifter for 12864 display on Duet 2 Wifi:
I may have left too little clearance for the headers.
option 2 is to cut off the 10 way IDC on the ribbon and replace with a 2x5 dupont style housing, or as I often end up, cutting down a 2x40 or laminating any combination of smaller housings (just make sure to align the release catch on the outside if you need to make alterations)